AI for chip
AI and LLMs in chip design workflows; starting with LLM evaluation.
About
- Semiconductor professional with 15 years of experience in chip design.
- Currently building recursive superintelligence for chip design, starting with LLM evaluation.
Experience
Fifteen years of chip design.
ARA LabPalo Alto, CACo-FounderBacked by DCVC.
MetaSystem architecture, memory subsystem architecture and performance modeling for the MTIA AI infra acceleratorAR/VR low-power SoC.
InnoviumAcquired by MarvellStartup experience with networking chips
AppleCPU design for the A5, A6, and A7 SoCs
Education
Degrees.
University of MichiganBSE & MSE, Computer Science and Engineering
SJTU–UM Joint InstituteElectronic EngineeringShanghai Municipal Scholarship.
Interests
What I’m drawn to.
AI infra (GPU / accelerator)
Hardware and systems for AI infrastructure.
Physical AI silicon
Silicon for sensing, robotics, and embodied AI.
Life
Outside work, Kelly keeps a healthy, highly disciplined lifestyle, with consistent training as a long-term practice. Weekly: HIIT, running, strength training, yoga, and boxing. Also Spartan Race, Hyrox, and recreational running races. Likes reading books, though reads less than before, now that AI is around.
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